Shortages of semiconductors are battering automakers and tech giants, raising alarm bells from Washington to Brussels to Beijing. The crunch has raised a fundamental question for policymakers, customers and investors: Why can’t we just make more chips?
There is both a simple answer and a complicated one. The simple version is that making chips is incredibly difficult—and getting tougher.
“It’s not rocket science—it’s much more difficult,” goes one of the industry’s inside jokes.
The more complicated answer is that it takes years to build semiconductor fabrication facilities and billions of dollars—and even then the economics are so brutal that you can lose out if your manufacturing expertise is a fraction behind the competition. Former Intel Corp. boss Craig Barrett called his company’s microprocessors the most complicated devices ever made by man.
This is why countries face such difficulty in achieving semiconductor self sufficiency. China has called chip independence a top national priority in its latest five-year plan, while U.S. President Joe Biden has vowed to build a secure American supply chain by reviving domestic manufacturing. Even the European Union is mulling measures to make its own chips. But success is anything but assured.
Manufacturing a chip typically takes more than three months and involves giant factories, dust-free rooms, multi-million-dollar machines, molten tin and lasers. The end goal is to transform wafers of silicon—an element extracted from plain sand—into a network of billions of tiny switches called transistors that form the basis of the circuitry that will eventually give a phone, computer, car, washing machine or satellite crucial capabilities.
More from Bloomberg Big Take: Chip Shortage Forces Carmakers to Strip Out High-Tech Features
Sources: Company and industry reports, Our World in Data
Cleaner Than a Surgery
Before you put silicon into chipmaking machines, you need a clean room. A very clean room. Individual transistors are many times smaller than a virus. Just one speck of dust can cause havoc and millions of dollars of wasted effort. To mitigate this risk, chipmakers house their machines in rooms that essentially have no dust.
1 cubic
meter of air
Class 1 chip
manufacturing
clean room
Hospital operating theater
Each dust particle is counted as anything less than 200 nanometers (billionths of a meter) in size
1 cubic
meter of air
Class 1 chip
manufacturing
clean room
Hospital operating theater
Each dust particle is counted as anything less than 200 nanometers (billionths of a meter) in size
1 cubic
meter of air
Class 1 chip
manufacturing
clean room
Hospital operating theater
Each dust particle is counted as anything less than 200 nanometers (billionths of a meter) in size
1 cubic
meter of
air
Class 1 chip
manufacturing
clean room
Hospital operating theater
Each dust particle is counted as anything less than
200 nanometers (billionths of a meter) in size
Source: ASML
To maintain that environment, the air is constantly filtered and very few people are allowed in. If more than one or two workers appear on a chip production line—wrapped head-to-toe in protective equipment—that could be a sign something’s wrong. The real geniuses behind semiconductor design and development work miles away.
An employee wearing protective gear walks past machines in a clean room at the GlobalFoundries semiconductor plant, Malta, New York, U.S.
An employee wearing protective gear walks past machines in a clean room at the GlobalFoundries semiconductor plant, Malta, New York, U.S.
An employee wearing protective gear walks past machines in a clean room at the GlobalFoundries semiconductor plant, Malta, New York, U.S.
An employee wearing protective gear walks past machines in a clean room at the GlobalFoundries semiconductor plant, Malta, New York, U.S.
An employee wearing protective gear
walks past machines in a clean room at the GlobalFoundries semiconductor plant,
Malta, New York, U.S.
Photographer: Adam Glanzman/Bloomberg
Even with all those precautions, the wafers of silicon can’t be touched by humans or exposed to the air. They travel between machines in cartridges carried by robots that run on tracks in the ceiling. They only emerge from the safety of those cartridges when they’re inside the machines and it’s time for a key step in the process.
Video: Adam Glanzman/Bloomberg
Atomic-Level Manufacturing
One of the most difficult parts of the process is lithography, which is handled by machines made by ASML Holding NV. The company’s gear uses light to burn patterns into materials deposited on the silicon. These patterns eventually become transistors. This is all happening at such a small scale, the current way to make it work is to use extreme ultraviolet light, which usually only occurs naturally in space. To recreate this in a controlled environment, ASML machines zap molten droplets of tin with a laser pulse. As the metal vaporizes, it emits the required EUV light. But even that is not enough. Mirrors are needed to focus the light into a thinner wavelength.
Oxidation and coating
Types of
equipment
Layers of insulating and conducting materials are applied to the surface of the silicon wafer. The wafer is then covered by a uniform coat of photoresist material.
Silicon nitride
Photoresist
Silicon substrate
Silicon dioxide
Projected
UV light
Lithography
The integrated circuit patterns
specified in the design are
mapped onto a glass plate
called a photomask.
Ultraviolet (UV) light is shone
through the mask to transfer
the pattern to the photoresist
layer on the silicon disk.
The exposed portion can then
be chemically removed.
Projection lens
Patterns are projected
repeatedly onto the wafer
Arrow indicate movement direction
Development and bake
Wafers are developed to
remove the non-exposed areas
of photoresist then baked to remove solvent chemicals.
Layers unprotected
by photoresist
Areas of the silicon wafer unprotected by photoresist
are removed and cleaned
by gases or chemicals.
Photoresist layer
The wafer is showered with
ionic gases that modify the
conductive properties of the
new layer by adding impurities,
such as boron and arsenic.
Doped region
Metal deposition
and etching
A similar process is used
to lay down the metal links between transistors.
Metal connector
Steps 1-5 are repeated hundreds of times with different chemicals to create
more layers, depending on the desired circuit features.
Completed wafer
Each completed wafer
contains hundreds of
identical integrated
circuits. The wafers are
sent for assembly, packaging
and testing which includes cutting the wafer into individual chips.
Types of
equipment
Close up of
a silicon wafer
Oxidation and coating
Types of
equipment
Layers of insulating and conducting materials are applied to the surface of the silicon wafer. The wafer is then covered by a uniform coat of photoresist material.
Silicon nitride
Photoresist
Silicon substrate
Silicon dioxide
Projected
UV light
Lithography
The integrated circuit
patterns specified in the
design are mapped onto
a glass plate
called a photomask.
Ultraviolet (UV) light is
shone through the mask
to transfer the pattern to
the photoresist layer on the
silicon disk. The exposed
portion can then
be chemically removed.
Projection lens
Patterns are projected
repeatedly onto the wafer
Arrow indicate movement direction
Development
and bake
Wafers are developed to
remove the non-exposed areas of photoresist then baked to remove solvent chemicals.
Layers unprotected
by photoresist
Areas of the silicon
wafer unprotected by photoresist are removed and cleaned by gases
or chemicals.
Photoresist layer
The wafer is showered with ionic gases that modify the conductive properties of the
new layer by adding
impurities, such as
boron and arsenic.
Doped region
Metal deposition
and etching
A similar process is used
to lay down the metal links between transistors.
Metal connector
Steps 1-5 are repeated hundreds of times with different chemicals to
create more layers, depending on the desired circuit features.
Completed wafer
Each completed wafer
contains hundreds of
identical integrated
circuits. The wafers are
sent for assembly, packaging
and testing which includes cutting the wafer into individual chips.
Types of
equipment
Close up of
a silicon wafer
Oxidation and coating
Layers of insulating and conducting materials
are applied to the surface
of the silicon wafer.
The wafer is then covered
by a uniform coat of photoresist material.
Types of
equipment
Silicon nitride
Photoresist
Silicon substrate
Silicon dioxide
Projected
UV light
Lithography
The integrated circuit
patterns specified in the
design are mapped onto
a glass plate
called a photomask.
Ultraviolet (UV) light
is shone through the
mask to transfer the pattern
to the photoresist layer
on the silicon disk.
The exposed portion
can then be chemically
removed.
Projection
lens
Patterns are projected
repeatedly onto the wafer
Arrow indicate movement direction
Development
and bake
Wafers are developed
to remove the non-exposed areas of photoresist then baked to remove solvent chemicals.
Layers unprotected by photoresist
Areas of the silicon
wafer unprotected by photoresist are removed and cleaned by gases
or chemicals.
Photoresist layer
The wafer is showered with ionic gases that modify the conductive properties of the new layer by adding
impurities, such as
boron and arsenic.
Doped region
Metal deposition
and etching
A similar process is
used to lay down the
metal links between
transistors.
Metal connector
Steps 1-5 are repeated hundreds of times
with different chemicals to create more layers, depending on the desired circuit features.
Close up
of a silicon wafer
Completed wafer
Each completed wafer contains hundreds of
identical integrated
circuits. The wafers
are sent for assembly,
packaging and testing
which includes cutting the wafer into individual chips.
Types of
equipment
Types of
equipment
Oxidation and coating
Layers of insulating and conducting materials
are applied to the surface of the silicon wafer.
The wafer is then covered by a uniform coat
of photoresist material.
Silicon
nitride
Photoresist
Silicon
substrate
Silicon
dioxide
Lithography
The integrated circuit patterns specified in
the design are mapped onto a glass plate called
a photomask. Ultraviolet (UV) light is shone
through the mask to transfer the pattern to the
photoresist layer on the silicon disk. The exposed
portion can then be chemically removed.
Projected
UV light
Patterns are projected
repeatedly onto the wafer
Projection
lens
Arrow indicate movement direction
Development
and bake
Wafers are developed
to remove the non-exposed areas of photoresist then baked to remove solvent chemicals.
Layers unprotected
by photoresist
Areas of the silicon
wafer unprotected by photoresist are removed and cleaned by gases
or chemicals.
Photoresist layer
The wafer is showered with ionic gases that modify the conductive properties of the new layer by adding
impurities, such as
boron and arsenic.
Doped region
Metal deposition
and etching
A similar process is
used to lay down the
metal links between
transistors.
Metal connector
Steps 1-5 are repeated hundreds of times
with different chemicals to create more layers, depending on the desired circuit features.
Types of
equipment
Completed wafer
Each completed wafer contains
hundreds of identical integrated
circuits. The wafers are sent for assembly, packaging and testing which includes cutting the wafer into individual chips.
Sources: Boston Consulting Group, Semiconductor Industry Association, Gartner
More from Bloomberg Graphics: How a Chip Shortage Snarled Everything From Phones to Cars
Burdensome Economics
Chip plants run 24 hours a day, seven days a week. They do that for one reason: cost. Building an entry-level factory that produces 50,000 wafers per month costs about $15 billion. Most of this is spent on specialized equipment—a market that exceeded $60 billion in sales for the first time in 2020.
Heavy Duty
Sales of equipment used in chip manufacturing have doubled since 2015
Global wafer fab equipment market
Global wafer fab equipment market
Global wafer fab equipment market
Source: SEMI
Three companies—Intel, Samsung and TSMC—account for most of this investment. Their factories are more advanced and cost over $20 billion each. This year, TSMC will spend as much as $28 billion on new plants and equipment. Compare that to the U.S. government’s attempt to pass a bill supporting domestic chip production. This legislation would offer just $50 billion over five years.
Once you spend all that money building giant facilities, they become obsolete in five years or less. To avoid losing money, chipmakers must generate $3 billion in profit from each plant. But now only the biggest companies, in particular the top three that combined generated $188 billion in revenue last year, can afford to build multiple plants.
Big-Fish Industry
Intel, Samsung and TSMC generated almost as much revenue in 2020 as the next 12 largest chipmakers combined
Combined total
Texas Instruments
STMicroelectronics
Combined revenue
of the top 3
Combined revenue
of the rest
Combined total
Texas Instruments
STMicroelectronics
Combined revenue
of the top 3
Combined revenue
of the rest
Combined total
Combined
revenue of the top 3
Texas Instruments
STMicroelectronics
Combined
revenue of
the rest
Combined total
Texas Instruments
Combined revenue
of the top 3
Combined revenue
of the rest
STMicroelectronics
Note: Figures for Samsung and Sony include their chipmaking businesses only.
Sources: Company data compiled by Bloomberg; IDC
The more you do this, the better you get at it. Yield—the percentage of chips that aren’t discarded—is the key measure. Anything less than 90% is a problem. But chipmakers only exceed that level by learning expensive lessons over and over again, and building on that knowledge.
The brutal economics of the industry mean fewer companies can afford to keep up. Most of the roughly 1.4 billion smartphone processors shipped each year are made by TSMC. Intel has 80% of the market for computer processors. Samsung dominates in memory chips. For everyone else, including China, it’s not easy to break in.
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