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AMD Chipmaker TSMC to Use AMD Chips for Chipmaking - HPCwire

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TSMC has tapped AMD to support its major manufacturing and R&D workloads. AMD will provide its Epyc Rome 7702P CPUs – with 64 cores operating at a base clock of 2.0GHz – implemented in HPE’s single-socket ProLiant DL325 G10 server platforms. This is a bit of a role reversal for the two companies, as TSMC manufactures AMD’s Epyc 7nm Rome and Milan chips.

TSMC supplies a vast portion of the world’s processing power, and its own enterprise computing is mission-critical and virtually uninterruptible. Like any company over time, however, TSMC has found itself in need of an upgrade – a process it detailed in a recent case study. The previous-generation datacenters had been space- and power-limited, said Simon Wang, director of the Infrastructure and Communication Services Division at TSMC.

The AMD Epyc Rome 7702P CPU.

With efficiency and ease of integration in mind, TSMC began hunting for hardware to suit its needs, beginning with an initial deployment for TSMC’s general workload. Eventually – and, TSMC says, uninfluenced by AMD’s customer status – the company landed on the AMD Epyc processors housed in HPE servers.

“Compatibility was the key factor before we started the large-scale deployment [of AMD’s CPUs],” explains Wang. “We had thorough discussions with HPE, and the AMD product was readily available to use directly on our existing architecture, reducing the cycle time. Otherwise, we need to do more testing, and that will significantly increase the time to deployment.”

“Performance-wise, we had no doubt,” he continued. “We tested [the CPUs] with key applications and performance was excellent. For manufacturing and the general workloads for support functions, there has been no issue with compatibility.” Memory density was another priority for TSMC, and the company was pleased with the performance of the AMD hardware on that front: in testing, the virtual instances required fewer resources and achieved improved performance. These efficiency improvements allowed TSMC to provision fewer servers, saving space and power.

TSMC’s Workloads

TSMC’s various divisions use its datacenters for a variety of purposes, ranging from research and development to the actual operation of the fabrication equipment. Much of this work is done through virtual machines, allowing the datacenters to be located offsite. “We designed and implemented the virtualization of the computing, storage and network, and all of that in our standard template of service architecture,” Wang explained. “I need to find products that can be directly introduced into this standard template, and then deploy them quickly across our datacenters, without redesigning the architecture.”

“For automation with the machinery inside our fab, each machine needs to have one x86 server to control the operation speed and provision of water, electricity and gas, or power consumption,” he said. “These [production] machines are very costly. They might cost billions of dollars, but the servers that control them are much cheaper. I need to make sure that we have high availability in case one rack is down, then we can use another rack to support the machine.”

“In addition to virtualization, we also have other software,” he elaborated. “For instance, there is path alternation protocol, PAP, that we use for controlling the communication between production machines and the virtual servers. When a server goes down, PAP automatically connects the machines to another VM server in the same cluster.”

What’s Next

Following a successful deployment for the general workload, the AMD rollout is now continuing across the company through installations in the manufacturing and R&D teams. TSMC might change up the AMD hardware in play, and it currently has its eye on the 24-core AMD Epyc Rome 7F72, which has a base clock rate of 3.2GHz.

“That’s the CPU we’re considering for R&D, because of the high clock rate,” Wang said. “This team doesn’t necessarily need more sockets or cores. For R&D, if we use two sockets, that might create unexpected effects, because it means one CPU needs to communicate with another CPU, which will create overheads. So, for R&D, we choose a one-socket CPU and the high clock-rate will be an important advantage.”

And that’s not all TSMC has planned on the hardware upgrade front, either. “Two more datacenters will be implemented [with the AMD/HPE technology] in 2021,” Wang said. “One in Tainan, the other in Hsinchu.”

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