Cisco Systems Inc. today is updating its family of Silicon One semiconductors used in next-generation 5G network switches and routers.
The new processors include a high-end chip designed to enable “web-scale” switching at unprecedented speeds, boasting an industry-first maximum bandwidth of 25.6 terabytes per second.
Cisco debuted its Silicon One chip architecture back in December 2019, saying at the time it was aiming to create a “common foundation for tomorrow’s networks.” The Silicon One processors are used to build both modular and fixed routers and switches in large networks operated by major enterprises and telecommunications firms.
Those networks have traditionally been made up of thousands of different devices, powered by various types of application-specific integrated circuits. It’s a fragmented landscape, one that causes problems because of the need to validate code separately for each type of device. Cisco is trying to fix the fragmented ecosystem with its Silicon One family, which can power every type of networking device, eliminating the technical challenges that arise from using chips with different architectures.
Cisco is launching three new Silicon One processors today, bringing its total number of chips to 10 since the family was first launched. They include the new Cisco Silicon One G100 processor, which the company said is the industry’s first 25.6Tbps programmable and fully shared packet buffered device, built using a seven-nanometer chipmaking process.
“By extending the Cisco Silicon One family to 25.6Tbps, Cisco now provides the highest performance routing silicon that is 1.7 times higher bandwidth and more than 3 times higher packets-per-second than other routing silicon on the market, and the highest switching performance of 25.6T,” said Eyal Dagan, senior vice president of the Common Hardware Group at Cisco. “With this new device, customers no longer need to choose between programmability, bandwidth, and efficiency.”
Dagan explained some of the advantages of having such an incredibly fast switching chip. He said that it combines numerous programmable functions such as parsing, processing, time stamping, counters, meters, histograms, watermarks and flow analytics to create a “fully programmable temporal view” of network traffic patterns.
In turn, that enables network operators to replay past events to understand their network dynamics better than before. As a result, they can troubleshoot problems, identify malicious attacks and optimize their infrastructure for higher performance.
The Silicon One G100 also features a 1.6Tbps interface that makes it possible to scale up networks to a level that was previously impossible, Dagan said.
The company also unveiled the new Cisco Silicon One Q211L switch, which extends the its existing 12.8Tbps Q200L, 6.4Tbps Q201L and 3.2Tbps Q202L leaf and Top of Rack portfolio of switches. Meanwhile, on the network routing side, Cisco announced the Silicon One Q200, which extends its existing family of 8Tbps Q200, 6.4Tbps Q201 and 3.2Tbps Q202 routing devices. Both chips are in production now, Dagan said.
Analyst Holger Mueller of Constellation Research Inc. told SiliconANGLE that one of the biggest trends in information technology these days is to “software-define everything” and that this is just beginning now in networking with the convergence of routing and switching.
“Cisco missed that trend initially, but it is working hard to make up for it with the Silicon One platform,” Mueller said. “Bringing the product family to 10 devices already is quite a feat considering the platform was only announced 15 months ago. It shows the level of urgency Cisco is placing on this, and that will please enterprise technology executives that are trying to unify and harmonize their software-defined, infinite-connectivity strategies.”
Dagan said samples of the Silicon One G100 are being made available to customers now, while the Q211L and Q211 chips are already in production.
Image: Cisco Systems
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