One of the problems with designing things on a chip is finding a good way to talk to the outside world. You may not design chips yourself, but you care because you want to connect your circuits — including other chips — to the chips in question. While I2C and SPI are common solutions, today’s circuits are looking for more bandwidth and higher speeds, and that’s where Interlaken comes in. [Comcores] has an interesting post on the technology that blends the best of SPI 4.2 and XAUI.
The interface is serial, as you might expect. It can provide both high-bandwidth and low-latency multi-channel communications. Interlaken was developed by Cisco and Cortina Systems in 2006 and has since been adopted by other industry-leading companies. Its latest generation supports speeds as high as 1.2 Tbps.
Interlaken can support up to 65,535 data streams and features error correction. The interface also handles retransmissions, so the users don’t have to. Interlaken uses a meta-frame concept. For each lane, a set of words associated with the meta-frame are sent along with the payload of control and data words. These include alignment information, cock compensation, status information, and error-checking data.
Unless you develop chips or build FPGAs, you probably won’t worry too much about the internal details, at least not yet. But the time may be near when the next cool device the delivery guy leaves on your porch expects to use Interlaken for communicating with the outside world.
Meanwhile, there’s I3C (not I2C, mind you). Then again, for the kinds of things we do, there’s nothing wrong with good old SPI.
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April 17, 2023 at 03:00PM
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